催化学报  2014, Vol. 35 Issue (8): 1376-1384   PDF (698KB)    
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武卫明
刘中波
赵哲
张小敏
区定容
涂宝峰
崔大安
程谟杰
Gadolinia-doped ceria barrier layer produced by sputtering and annealing for anode-supported solid oxide fuel cells
Weiming Wua,b, Zhongbo Liua,b, Zhe Zhaoa, Xiaomin Zhanga,b, Dingrong Oua, Baofeng Tua, Da'an Cuia, Mojie Chenga     
a. Division of Fuel Cells, Dalian National Laboratory for Clean Energy, Dalian Institute of Chemical Physics, Chinese Academy of Sciences, Dalian 116023, Liaoning, China;
b. University of Chinese Academy of Sciences, Beijing 100049, China
Abstract: We prepared gadolinia-doped ceria (GDC) barrier layers by sputtering and annealing at various temperatures. We then investigated the effects of the GDC barrier layers on the performance of anode-supported solid oxide fuel cells. Sputtering at 200 ℃ readily produced a uniform, thin layer of cubic GDC. Sputtering and annealing at 900-1100 ℃ formed uniform, thin, dense films, which effectively prevented the reaction between the yttria-stabilized zirconia electrolyte and the Ba0.5Sr0.5Co0.8Fe0.2O3-δ cathode. The single cells assembled with the thin, dense GDC barrier layers sputtered at 200 ℃ and annealed at 900-1000 ℃ exhibited excellent electrochemical performance.
© 2014, Dalian Institute of Chemical Physics, Chinese Academy of Sciences.
Published by Elsevier B.V. All rights reserved.
Key words: Solid oxide fuel cell     Rare earth metal oxide     Gadolinia-doped ceria     Barrier layer     Sputtering     Annealing    

1. Introduction

For intermediate-temperature solid oxide fuel cells (IT-SOF­Cs) that use cobalt-containing perovskite cathodes, such as La1−xSrxCo1−yFeyO3−δ (LSCF), La1−xSrxCoO3−δ (LSC), and Ba0.5Sr0.5­Co0.8Fe0.2O3−δ (BSCF), it is essential to include a doped ceria barrier layer to prevent detrimental reactions between the cobalt-containing materials and the yttria-stabilized zirconia (YSZ) electrolyte [1, 2, 3, 4, 5]. Conventionally, this doped ceria barrier layer is prepared by wet-coating and sintering [5, 6, 7, 8, 9]. However, this process cannot produce an ideal doped barrier layer because of the severe reaction between ceria and YSZ, greatly increasing the ohmic resistance, as well as the increased porosity of the interface [5, 6, 7]. Better fabrication techniques for the doped ceria barrier layer are needed; one such candidate technique is sputtering [9, 10, 11, 12, 13, 14].

A thin gadolinia-doped ceria (GDC) barrier layer should meet several requirements. First, it should be free of cracks and pinholes to suppress elemental diffusion and reaction between the cathode and YSZ electrolyte. Second, it should fully adhere to the YSZ electrolyte to reduce contact resistance. Third, it should be free of ceria-zirconia solid solution at ceria/YSZ interface to reduce ohmic resistance [5, 6]. A thin, ceria-based electrolyte layer, fully adhered to YSZ electrolyte with no cracks or pin-holes, could be obtained by sputtering at deposition temperatures higher than 400 °C; however, performing this process in vacuum is quite complicated and inconvenient [10, 11, 12].

An alternative route for a thin and dense ceria barrier layer is a sputtering in combined with annealing process. Annealing can eliminate the defects in thin electrolyte film [15, 16, 17]. In this paper, the GDC barrier layers were prepared through sputtering and annealing, and the application of the GDC barrier layer for anode-supported SOFC was investigated. The elemental diffusion and interfacial reaction at the interfaces of GDC/YSZ and cathode/electrolyte, as well as the performance of Ni-YSZ/ YSZ/GDC/BSCF-GDC single cells were studied.

2. Experimental

BSCF and GDC powders were prepared by a sol-gel process. BSCF powders were synthesized using citrate-EDTA as a complexing agent and calcined at 950 °C for 5 h. GDC powders were prepared using glycine as a complexing agent and calcined at 700 °C for 2 h. The cathode slurry was prepared from a mixture of the as-prepared BSCF and GDC powders (mass ratio 70:30), organic binder, and butanol solvent.

The NiO-YSZ (mass ratio 45:55) anode substrates were fabricated from mixed NiO and YSZ powders. The YSZ thin film was prepared on the NiO-YSZ substrate by tape-casting and co-firing at 1300 °C. The YSZ electrolyte film was ~20 μm thick. The NiO-YSZ/YSZ assemblies were ~20 mm in diameter and 0.6 mm in thickness. Before depositing the GDC layer, each NiO-YSZ/YSZ assembly was ultrasonically cleaned in acetone, ethanol, and deionized water successively for ~15 min and then dried. The GDC layer was deposited by radio frequency magnetron sputtering (JCP-200 instrument; Beijing Technical Company, Beijing, China) using an alloy target with a composition of 90 at% Ce and 10 at% Gd (99.9% pure, Huizhou Top Metal Material Co., Huizhou, China). The sputtering gas was a mixture of argon and oxygen at a 10:1 flow ratio. The NiO-YSZ/YSZ assembly was held at 200 °C during sputtering. The GDC interlayer was sputtered on the YSZ electrolyte film with a specific target power density of 9 W/cm2 under 0.5 Pa for 50 min. The NiO-YSZ/YSZ/GDC assemblies were annealed at 800-1100 °C for 2 h. The BSCF-GDC cathode slurry was then coated on the GDC layer and sintered at 1000 °C for 3 h; the cathode area was ~0.5 cm2.

To study the interfacial reactions occurred at the cathode/electrolyte and YSZ/GDC interfaces, X-ray diffraction (XRD; Rigaku D/max-2500PC) was performed from the cathode side after scraping off the cathode. SEM (FEI QUANTA 200F) was also performed for the GDC interlayer.

The single cells were sealed at the ends of two alumina tubes in a resistance furnace. The cathode surface was coated with silver paste to improve current collection. The cathode and anode were spring-pressed with silver and nickel mesh current collectors, respectively. The electrochemical performance was measured by the four-probe method. Hydrogen humidified at room temperature was fed to the anode at 100 ml/min, while air was fed to the cathode at 200 ml/min. The NiO-YSZ anode was reduced in situ at 800 °C using hydrogen. Polarization curves were measured after the cells were discharged at 0.9 V for 3 h. Impedance was typically measured from 1 MHz to 0.08 Hz with signal amplitude of 10 mV under open-circuit conditions on a Solartron 1287 potentiostat and a 1260 frequency response analyzer.

3. Results and discussion
3.1. XRD results

Figure 1 shows XRD patterns of the GDC barrier layers fabricated by sputtering and annealing at different temperatures. All samples exhibited diffraction peaks corresponding to the cubic fluorite phases of GDC (JCPDS 75-0161) and YSZ (JCPDS 30-1468) electrolyte. The cubic fluorite phase of GDC was formed during sputtering at 200 °C, first by oxidation of metallic Ce and Gd, followed by crystallization into the cubic fluorite structure oxide. The YSZ diffraction peaks came from the YSZ electrolyte substrate. The appearance of very strong diffraction peaks from the YSZ demonstrates that the GDC layer was very thin. The peak intensity and width of the GDC barrier layer varied with annealing temperature. As the annealing temperature increased, the peaks become sharper and stronger, indicating that the GDC crystals grew as the temperature increased. Using the Scherrer equation, we calculated the average GDC crystal size to be ~18 nm in the as-sputtered film and ~26 nm in the film annealed at 900 °C. These results are similar to those of combustion-synthesized GDC powders, whose crystal size increased from 5-12.5 nm in the primary powders to 27.9 nm in the powders calcined at 900 °C [18]. As the annealing temperature increased, the GDC diffraction peaks gradually shifted to higher angles, reflecting decreases in its lattice parameters. The diffusion of Zr4+ and/or Y3+ from the YSZ electrolyte into the GDC layer can reduce the unit cell volume of ceria-based oxides [5, 6, 19]. This reduction in lattice parameters indicates that the GDC layer and YSZ film reacted to form a solid solution during annealing at high temperatures.

Fig. 1. XRD patterns of the GDC barrier layers as-sputtered (1) and annealed at 800 °C (2), 900 °C (3), 1000 °C (4), and 1100 °C (5). The patterns were taken from the side of the GDC barrier layer. The two patterns at the bottom are the standard XRD patterns of YSZ (JCPDS 30-1468) and GDC (JCPDS 75-0161).

Figure 2 shows the XRD patterns of the anode-supported Ni-YSZ/YSZ/GDC/BSCF-GDC single cells. The diffraction peaks of GDC layer and YSZ substrate remained as the main diffraction peaks. Some small diffraction peaks came from the residues of the BSCF cathode [4] and the silver current collectors (JCPDS 01-1164). Some samples exhibited new diffraction peaks. We attribute the diffraction peaks at 2θ = 43.24° and 53.65° to BaZrO3 (JCPDS 74-1299), and the new peak at 2θ = 46.40° to SrCoO3−δ (JCPDS 39-1083). The SrCoO3−δ phase found here likely came from decomposition of BSCF, and the BaZrO3 phase likely came from diffusion and reaction of Ba2+ ions with the YSZ electrolyte. This BaZrO3 phase has been found in a composite of YSZ and BSCF calcined at 900 °C [4, 5]. In the present study, annealing above 900 °C eliminated the BaZrO3 phase, indicating that the GDC barrier layer had been densified, effectively preventing the diffusion of Ba2+ ions and the reaction of Ba2+ ions with YSZ to BaZrO3. The SrCoO3−δ diffraction peak was also present in samples with the GDC barrier layer annealed above 900 °C because it can also be formed by reaction between BSCF and GDC above 900 °C [4].

Fig. 2. XRD patterns of Ni-YSZ/YSZ/GDC/BSCF-GDC cells with the GDC barrier layer as-sputtered (1) and annealed at 800 °C (2), 900 °C (3), 1000 °C (4), and 1100 °C (5). The patterns were taken from the cathode side after scraping off the cathode. The three patterns at the bottom are the standard XRD patterns of BaZrO3 (JCPDS 74-1299), YSZ (JCPDS 30-1468), and GDC (JCPDS 75-0161).
3.2. Microstructure of GDC interlayer

Figure 3 shows SEM micrographs of the GDC barrier layers as-sputtered and annealed at 900 °C. For both samples, the YSZ surface was covered with a uniform, thin GDC layer, and the GDC surface had some large particles (~150 nm in diameter). As found in the XRD results, the primary crystal size of GDC in the as-sputtered film was ~18 nm. The primary crystals cannot be discriminated in the SEM pictures. The presence of large particles on the as-sputtered GDC surface indicates that they formed during sputtering at 200 °C and are nanocrystalline aggregates. The as-sputtered GDC film was ~400 nm thick and composed of loosely packed crystals, especially near the surface of the YSZ film. The film annealed at 900 °C was denser and thinner (~300 nm), likely caused by film densification. The intimate contact of the GDC and YSZ films also decreased the film thickness. We conclude that sputtering produced a uniform, thin GDC film consisting of 18 nm GDC nanocrystals on the YSZ electrolyte surface, and that annealing at 900 °C densified the GDC film.

Fig. 3. SEM micrographs of the GDC barrier layer as-sputtered (a) and annealed at 900 °C (b); cross-sectional SEM of the GDC barrier layer as-sputtered (c) and annealed at 900 °C (d). The GDC barrier layers were initially sputtered on the YSZ electrolyte.
3.3. Impedance analysis results

Figure 4 shows Nyquist and Bode impedance spectra of the anode-supported Ni-YSZ/YSZ/GDC/BSCF-GDC single cells. All the Nyquist plots exhibit two main arcs, a high-frequency arc and a low-frequency arc; the Nyquist plots of some cells, such as the cell with the as-sputtered GDC layer, include some small arcs.

Fig. 4. Nyquist plots ((a), (b), (c)) and Bode plots ((a¢), (b¢), (c¢)) of the Ni-YSZ/YSZ/GDC/BSCF-GDC single cells, with the GDC barrier layer as-sputtered (1) and annealed at 800 °C (2), 900 °C (3), 1000 °C (4), and 1100 °C (5), measured at 800 °C ((a), (a¢)), 700 °C ((b), (b¢)), and 600 °C ((c), (c¢)).

We attribute the high-frequency arc to charge transfer of O2− from cathode to electrolyte [5, 20, 21], which is very sensitive to changes at the cathode/electrolyte interface. We attribute the low-frequency arc mainly to gas diffusion in the anode [22, 23]. In Bode plots, the frequencies corresponding to the peaks of the imaginary parts are the summit frequencies of Nyquist plots, which are reciprocals of the time constants of the physicochemical process. As the annealing temperature of the GDC barrier layer increased, the summit frequency of the high-frequency arc first increased and then remained approximately constant above 900 °C. At 700 °C, for example, the summit frequencies are 251, 501, 5012, 5012, and 5012 Hz for the cells with GDC barrier layers as-sputtered and annealed at 800, 900, 1000, and 1100 °C, respectively. This trend suggests that the process related to the high-frequency arc greatly accelerated when the GDC barrier layer is annealed above 900 °C. The similarity in summit frequencies for cells with GDC layers annealed at 900-1100 °C indicates that the dense GDC layers result in the similar charge-transfer process. The summit frequency of the high-frequency arcs increased with operating temperature. For the cell with the GDC barrier layer annealed at 800 °C, the summit frequency increased from 126 Hz to 501 Hz to 2238 Hz when measured at 600, 700, and 800 °C, respectively, indicating that the process related to the high-frequency arc was accelerated with operating temperature according to the Arrhenius equation. The summit frequency of the low- frequency arcs remained almost constant with operating temperatures for all cells, indicating that the diffusion process changed very slightly with temperature.

To quantitatively evaluate each arc in the Nyquist plots, we used an equivalent circuit (Fig. 5) to fit the plots. The inductor L0 originated mainly from the metal probe leads and current collectors. R0 is the overall ohmic resistance. (R1, CPE1) and (R2, CPE2) correspond to the high-frequency and low-frequency arc, respectively. The largest change caused by annealing the GDC barrier layer is reflected in the great decrease of the high-frequency arc. Figure 6 shows how R1 and R0 varied with annealing temperature. When the GDC barrier layer was annealed at 900-1000 °C, the polarization resistance from the high-frequency arc decreased greatly down to similar values. At 600 °C, the R1 of the cell with as-sputtered GDC barrier layer was about 10.8 times that of the cell with the GDC barrier layer annealed at 900 °C. As previous discussed, the GDC layer was densified when annealed above 900 °C, and the dense GDC barrier layer effectively suppressed the reactions between BSCF and YSZ. This densification caused the low polarization resistance from the high-frequency arc.

Fig. 5. Electrochemical impedance model. L0: inductor; R0: ohmic resistance; R1: resistance of high-frequency arc; CPE1: constant phase element of high-frequency arc; R2: resistance of low-frequency arc; CPE2: constant phase element of low-frequency arc.

Fig. 6. Variations in polarization resistance of high-frequency arc (R1) and ohmic resistance (R0) with annealing temperature of the GDC barrier layer. The cells were measured at 600 °C.

The ohmic resistances deduced from the Nyquist plots (0.43-0.54 Ω cm2 at 600 °C) are much higher than the theoretical resistance of YSZ and the GDC electrolyte (~0.33 Ω cm2 at 600 °C) possible because of the contact resistance of the YSZ/GDC, electrode/electrolyte, and electrode/current collector interfaces. Both the YSZ/GDC and cathode/electrolyte interfaces can be affected by annealing. The differences in ohmic resistance of the cells originated mostly from the high- resistance phases at the YSZ/GDC and cathode/electrolyte interfaces produced during annealing and/or cell fabrication. The cell with the as-sputtered GDC barrier layer exhibited similar ohmic resistance to those with GDC barrier layer annealed at 800 and 900 °C. Annealing above 900 °C induced a slightly larger increase in ohmic resistance, which came from the formation of a ceria-zirconia solid solution. However, the differences in ohmic resistance among cells were much smaller when they were operated at 800 °C.

3.4. Cell performance

Figure 7 shows I-V and I-P curves of the anode-supported Ni-YSZ/YSZ/GDC/BSCF-GDC cells. At operating temperatures of 600-800 °C, the single cells with annealed GDC barrier layers performed better than the cell with as-prepared GDC barrier layer, and the performance of the single cells increased with annealing temperature. Figure 8 shows how the power density at 0.9 V varied with annealing temperature. The performance changed significantly by increasing the annealing temperature from 800 to 900 °C. Measured at 600 °C, the cell with the GDC barrier layer annealed at 900 °C exhibited a power density about 4.0 times that of the cell with the GDC barrier layer annealed at 800 °C. The cells with a GDC barrier layer annealed at 900-1100 °C exhibited similar superior performance. These results agree with those of the impedance spectra discussed previously, meaning that the GDC barrier layer annealed at 900-1100 °C can effectively prevent the reaction between BSCF and YSZ, while the same barrier annealed below 800 °C cannot.

Fig. 7. I-V and I-P curves of the Ni-YSZ/YSZ/GDC/BSCF-GDC single cells, with the GDC barrier layer as-sputtered (1) and annealed at 800 °C (2), 900 °C (3), 1000 °C (4), and 1100 °C (5). These curves were measured at 800 °C (a), 700 °C (b), and 600 °C (c).

Fig. 8. The power density at 0.9 V as a function of the annealing temperature of the GDC barrier layer. The cells were tested at 800 °C (1), 700 °C (2), and 600 °C (3).
4. Conclusions

We prepared a uniform, thin, dense GDC barrier layer by sputtering and annealing for use in an anode-supported cell. Sputtering at 200 °C easily produced a uniform, thin GDC layer composed of cubic GDC nanocrystals, but it cannot prevent reactions between YSZ and BSCF cathode. Annealing at 900-1100 °C densified the thin GDC layer. The thin, dense GDC barrier layer blocked elemental diffusion and reaction between BSCF and YSZ, greatly reducing polarization resistance. Elemental diffusion and reaction between the GDC layer and YSZ electrolyte during annealing slightly increased the ohmic resistance between 900 and 1100 °C. A suitable annealing temperature ranges from 900 to 1000 °C. The single cells with a thin, dense GDC barrier layer fabricated by sputtering at 200 °C and annealing at 900-1000 °C exhibited excellent performance.

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通过溅射与退火制备的用于固体氧化物燃料电池的氧化钆掺杂氧化铈电解质隔层
武卫明a,b, 刘中波a,b, 赵哲a, 张小敏a,b, 区定容a, 涂宝峰a, 崔大安a, 程谟杰a     
a. 中国科学院大连化学物理研究所清洁能源国家实验室(筹)燃料电池研究部, 辽宁大连 116023;
b. 中国科学院大学, 北京 100049
摘要:采用溅射或溅射与退火相结合的方法制备了一系列氧化钆掺杂的氧化铈(GDC)隔层,并考察了其对固体氧化燃料电池性能的影响. 结果表明,200 ℃下溅射获得了立方结构氧化钆掺杂的氧化铈均匀薄膜,在900-1100 ℃范围内的退火处理使得GDC薄膜致密,从而有效阻止了氧化钇掺杂的氧化锆电解质与阴极材料之间的反应,大幅度提高了电池的电化学性能.
关键词固体氧化物燃料电池     稀土金属氧化物     氧化钆掺杂的氧化铈     隔层     溅射     退火    
1. 前言

对于具有如La1-xSrxCo1-yFeyO3-δ(LSCF), La1-xSrxCoO3-δ(LSC)和Ba0.5Sr0.5Co0.8Fe0.2O3-δ(BSCF)的含钴钙钛矿阴极的中温固体氧化物燃料电池(IT-SOFC), 用于阻止阴极与氧化钇稳定的氧化锆(YSZ)电解质的掺杂氧化铈隔层的性质非常关键[1, 2, 3, 4, 5].  掺杂的氧化铈隔层一般通过湿法涂覆加烧结的方法制备[5, 6, 7, 8, 9].  然而, 氧化铈与YSZ的界面反应导致电池欧姆电阻增加, 氧化铈隔层的多孔结构能够导致不良界面.  这些均表明传统工艺并不能制备出理想的氧化铈隔层[5, 6, 7], 有必要开发如溅射一样的先进技术和工艺用于隔层的制备[9, 10, 11, 12, 13, 14].  

氧化钆掺杂的氧化铈(GDC)隔层需要满足以下要求.  首先, 掺杂的氧化铈隔层无裂纹或者针孔, 以阻止阴极与YSZ电解质间的元素扩散和反应;  第二, 氧化铈隔层应与YSZ电解质膜充分接触以减少接触电阻;  第三, 在氧化铈隔层与YSZ电解质的接触界面上应无铈锆氧化物固溶体生成, 以减少欧姆电阻[5, 6].  与YSZ电解质膜充分接触且无裂纹及针孔的氧化铈基电解质薄膜可以在高温(≥ 400 °C)下溅射沉积, 但高温溅射使真空中的溅射工艺复杂化[10, 11, 12].  通过溅射的方法直接制备致密氧化铈薄膜并不如预期的那样方便.  

溅射结合退火是制备致密氧化铈薄隔层的另一种途径.  退火处理能够消除电解质薄膜中的缺陷[15, 16, 17].  本文通过溅射结合退火的方法制备了GDC隔层, 应用于阳极支撑的SOFC, 研究了在GDC/YSZ和阴极/电解质两个界面上的元素扩散和界面反应, 以及Ni-YSZ/YSZ/GDC/ BSCF-GDC电池的性能.  

2. 实验部分

BSCF和GDC粉体均通过溶胶-凝胶法制备.  BSCF粉体的合成以柠檬酸铵-EDTA为络合剂, 在950 °C焙烧5 h.  GDC粉体的合成以甘氨酸为络合剂, 在700 °C焙烧2 h.  阴极浆料由BSCF和GDC粉体(质量比70:30)、有机胶和正丁醇溶剂制备而成.  

NiO-YSZ (质量比45:55)阳极基底由NiO与YSZ的混合粉体制备而成.  YSZ薄膜通过流延法在NiO-YSZ阳极基底上制备, 在1300 °C共焙烧而成, 厚度为约20 μm.  NiO-YSZ/YSZ二合一膜电极的直径为约20 mm, 厚度为约0.6 mm.  在溅射GDC薄膜之前, NiO-YSZ/YSZ膜电极分别在丙酮、乙醇以及去离子水中依次超声清洗15 min, 然后干燥.  GDC薄膜通过射频磁控溅射方法在JCP-200型磁控溅射镀膜机(北京泰克诺技术有限公司)中沉积.  采用组成为90 at% Ce与10 at% Gd的合金靶材(纯度99.9%, 惠州拓普金属材料有限公司).  以Ar与O2的混合气(流量比为10:1)为溅射气体.  在溅射过程中, NiO-YSZ/YSZ膜电极的温度保持在200 °C.  GDC隔层在9 W/cm2靶功率密度和0.5 Pa溅射气压下沉积50 min.  溅射有GDC隔层的NiO-YSZ/YSZ/GDC膜电极在800-1100 °C不同温度下分别退火处理2 h.  BSCF-GDC阴极浆料涂覆在GDC隔层之上并在100 0 °C烧结3 h, 阴极面积约为0.5 cm2.  

为了研究发生在阴极/电解质以及GDC/YSZ界面上的反应, XRD测试在刮掉阴极后从阴极侧进行, 采用Rigaku D/max-2500PC型X射线衍射仪.  GDC隔层的SEM微观形貌在FEI QUANTA 200F型扫描电子显微镜上拍摄.  

电池密封于电阻炉中两根氧化铝管的端口.  在电池阴极表面涂覆银浆以改善集流效果, 阴极和阳极分别采用银和镍集流网进行弹压.  电化学性能通过四端子法测试.  H2在室温下加湿后, 以100 ml/min的流速通入阳极侧, 空气以200 ml/min的流速通入阴极侧.  NiO-YSZ阳极在800 °C下通过H2还原, 在0.9 V放电3 h后测试电池的极化曲线.  交流阻抗谱采用Solartron 1287恒电位仪和Solartron 1260频响分析仪在开路电位下测试, 频率一般从1 MHz到0.08 Hz,施加振幅为10 mV的电压信号.  

3. 结果与讨论
3.1. XRD表征结果

图1展示了通过溅射以及在不同温度退火后GDC隔层的XRD谱.  对于所有样品, 均能发现立方萤石相GDC (JCPDS 75-0161)和YSZ (JCPDS 30-1468)电解质的衍射峰.  在200 °C下的溅射过程中, 立方萤石相的GDC隔层通过金属Ce及Gd粒子的氧化以及随后的晶化形成了立方萤石结构的氧化物.  YSZ的衍射峰来自YSZ电解质基底.  YSZ的强衍射峰说明GDC膜很薄.  GDC的衍射峰随着退火温度的变化而 变化.  随着退火温度升高, GDC隔层的衍射峰越来越锐、越强, 表明GDC晶粒随着退火温度升高而增长.  由Scherrer方程计算得出, 晶粒从GDC溅射膜中的约18 nm增长到900 °C退火处理后的约26 nm.  这与燃烧法合成GDC粉体相似, 其晶粒从初粉的5-12.5 nm增长到900 °C煅烧后的27.9 nm[18].  随着退火温度的升高, GDC衍射峰向高角度偏移, 说明晶胞参数逐渐减小.  YSZ电解质中的Zr4+和/或Y3+向GDC膜中的扩散能够减小铈基氧化物的晶胞尺寸[5, 6, 19].  晶胞参数的减小说明在高温退火过程中GDC薄膜与YSZ电解质发生了反应, 生成了铈锆氧化物固溶体.  

图2展示了阳极支撑Ni-YSZ/YSZ/GDC/BSCF-GDC电池的XRD谱.  GDC薄膜与YSZ基底的衍射峰为主要衍射峰, 一些小的衍射峰来自残留的BSCF阴极[4]及银集流体(JCPDS 01-1164).  某些样品出现了新的衍射峰, 其中2θ = 43.24°及53.65°处的衍射峰归属于BaZrO3 (JCPDS 74-1299), 2θ = 46.40°处的衍射峰归属于SrCoO3-δ(JCPDS 39-1083).  SrCoO3-δ明显来自BSCF的分解, 而BaZrO3来自Ba2+扩散以及与YSZ电解质的反应.  在900 °C焙烧的YSZ与BSCF的混合粉体中发现有BaZrO3[4, 5].  在本研究中, 当GDC隔层的退火温度高于900 °C时能阻止BaZrO3的生成, 说明GDC隔层更加致密, 能有效阻止Ba2+的扩散及其与YSZ电解质的反应.  当退火温度高于900 °C时出现了SrCoO3-δ的衍射峰, 这可能是由于BSCF与GDC发生反应所致[4].  

3.2. GDC隔层的微观结构

图3展示了GDC隔层的SEM微观形貌图, 其中GDC隔层为溅射沉积的以及在900 °C退火处理之后的样品.  可以看出, 各样品中YSZ表面均由均匀的GDC薄膜覆盖, 且在GDC表面出现粒径约为150 nm的大粒子.  从XRD结果可知, GDC溅射薄膜中的一次粒径约为18 nm, 而这些小粒子在SEM中并不能分辨出来.  GDC溅射薄膜表面出现的大粒子是在200 °C下溅射过程中形成的, 是纳米晶粒的团聚体.  GDC溅射薄膜的厚度约为400 nm, 由松散组装的纳米晶粒组成, 特别是在靠近YSZ电解质膜表面的地方.  900 °C退火之后, GDC薄膜厚度减小至约300 nm, 且具有致密结构.  GDC薄膜厚度的减小明显是由于薄膜致密化所致.  GDC薄膜与YSZ电解质膜的紧密接触也有助于减小膜厚.  因此, 可以得出如下结论:  通过溅射方法可以在YSZ电解质表面制备出均匀的、由粒径约为18 nm的纳米晶粒组成的GDC薄膜, 经90 0 °C退火处理可使其具有致密结构.  

3.3. 阻抗分析结果

图4以Nyquist和Bode图的形式展示了阳极支撑Ni-YSZ/YSZ/GDC/BSCF-GDC电池的阻抗谱图.  所有的Nyquist图主要由高频弧和低频弧两个弧所组成.  对于一些电池, 如具有GDC溅射隔层的电池, 其Nyquist图中含有一些小弧.  

高频弧归属于O2-从阴极转移到电解质的电荷传递过程[5, 20, 21], 其对阴极/电解质界面的变化非常敏感.  低频弧主要与阳极的气体扩散过程相关[22, 23].  在Bode图中, 虚部峰值所对应的频率是Nyquist图中的峰频, 是相应物化过程时间常数的倒数.  高频弧的峰频随着GDC隔层退火温度的升高先增大, 当退火温度高于900 °C时不再变化.  例如, 在700 °C下测试, 具有溅射的以及在800, 900, 1000, 1100 °C退火处理的GDC隔层电池的峰频分别为251, 501, 5012, 5012和5012 Hz.  这说明当GDC隔层的退火温度高于900 °C时, 显著加快了与高频弧相关的过程.  对于具有在900-1100 °C退火的GDC隔层的电池, 它们的高频弧具有相似的峰频, 说明致密的GDC隔层能够导致相似的电荷传递过程.  高频弧的峰频随着电池运行温度升高而增大.  对于具有800 °C退火的GDC隔层的电池, 其峰频从600 °C的126 Hz增长到700 °C的501 Hz, 再到800 °C的2238 Hz.  这些变化反映了当温度升高时, 与高频弧相关的过程将根据Arrenhius方程进行加速.  在不同的运行温度下, 所有电池低频弧的峰频基本保持不变.  这说明扩散过程随着温度仅发生非常微弱的变化.  

为了对Nyquist图中的每个弧进行量化分析, 本文采用如图5所示的等效电路进行拟合.  电感L0主要来自金属引线和集流体, R0是总欧姆电阻, (R1, CPE1)与(R2, CPE2)分别对应于高频弧和低频弧.  GDC隔层经退火之后, 反映在阻抗谱中最大的变化是高频弧的急剧减小.  R1R0与GDC隔层退火温度的变化关系如图6所示.  当GDC隔层在900-1100 °C退火时, 来自高频弧的极化电阻R1急剧减小至相似值.& #8197; 在600 °C时, 具有无退火处理GDC溅射隔层电池的R1为具有900 °C退火处理GDC隔层电池R1的10.8倍.  如前所述, 当在900 °C以上退火时, GDC隔层变得致密, 能有效阻止BSCF与YSZ之间的反应, 这就是与高频弧相关极化电阻较小的原因.  

通过由Nyquist图得到的欧姆电阻(600 °C时为0.43-0.54 Ω cm2)远高于YSZ与GDC电解质的理论电阻(600 °C时为0.33 Ω cm2), 这可能是由于YSZ/GDC、电极/电解质和电极/集流体界面的接触电阻所导致.  GDC隔层的退火处理可影响YSZ/GDC和阴极/电解质两个界面.  电池间欧姆电阻的差异主要是由于在退火和/或者电池制备过程中, 在YSZ/GDC和阴极/电解质界面上生成了高阻相杂质.  具有GDC溅射隔层以及在800和900 °C下退火处理GDC隔层的电池具有相似的欧姆电阻.  而当退火温度高于900 °C时, 欧姆电阻随着退火温度升高有较大增长, 这是由于生成了铈锆氧化物固溶体所致.  然而, 当电池在800 °C运行时, 不同电池间欧姆电阻的差别要小得多.  

3.4. 电池的性能

图7展示了阳极支撑Ni-YSZ/YSZ/GDC/BSCF-GDC电池的I-VI-P曲线.  在600-800 °C的运行温度下, GDC隔层的退火处理均可提高电池性能, 且电池性能随着退火温度升高而升高.  电池在0.9 V下的功率密度与GDC隔层退火温度间的变化关系如图8所示.  当退火温度从800 °C升高到900 °C时, 电池性能发生了显著变化.  当GDC隔层在900 °C退火时, 其电池的功率密度为800 °C退火电池的4.0倍.  当GDC隔层在900-1100 °C退火时, 电池具有类似的优良性能.  这与之前所讨论的有关阻抗谱的结果一致, 说明在此温度范围内退火处理的GDC隔层可有效阻止BSCF与YSZ之间的反应, 而在800 °C以下退火处理时, 不能有效阻止此反应.  

4. 结论

通过溅射结合退火的方法成功制备了用于阳极支撑电池的均匀、薄且致密的GDC隔层.  在200 °C下可以容易地溅射沉积出具有立方结构、由GDC纳米晶粒组成的均匀GDC薄膜, 但不能阻止YSZ与BSCF阴极间的反应.  通过在900-1100 °C下退火处理, GDC薄膜能够转化成致密薄膜.  薄且致密的GDC隔层阻止了BSCF与YSZ间的元素扩散和反应, 极大地减小了极化电阻;  GDC薄膜与YSZ膜之间的元素扩散和反应导致电池欧姆电阻增大, 合适的退火温度为900-1000 °C.  在200 °C下溅射且在900- 1000 °C退火的GDC隔层的电池显示出优良的性能.